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Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence.
This is an opportunity to join 349D - Electronics Test Hardware Engineering Group
. The group plays an essential role in Section 349 – Flight Electronics
. As a member of this group you will design, build and test specialized, mission-critical systems used for avionics and system verification. Our customers include product delivery managers, system testbeds, Assembly Test Lunch Operations (ATLO) testbed mangers, and mission operations managers.
In this role you will collaborate and/or participate with our senior engineers supporting the Europa and Mars Sample Return missions.
This role is ideal for a candidate who works closely with others and meets the demands of flight-projects. The job entails understanding customer requirements, matching requirements with existing product lines or enhancements to the product line. The person hired for this position will oversee hardware deliveries of flight and bench test equipment racks interfacing with Flight Computer and other boxes to test their functionality. This person would interface with Flight Electronics and Electronics Test Hardware Engineering teams, support equipment software team, and system engineers and end customer. This person would be the hardware team lead, and report to product delivery lead and Group Supervisor.Responsibilities
- Oversee team of engineers/technicians to design/develop/produce Support Equipment hardware and cabling.
- Work with Avionics and other subsystem teams to generate L4 requirements and derive L5 requirements.
- Develop and release documentation to fully describe the Support Equipment products.
- Oversee V&V of Support Equipment hardware.
- Follow JPL policies.
- Provide cost estimates of hardware/workforce to PDL.
- Participate in various Reviews from Peer level to CDR.
- Facilitate closure of Problem Reports using Institutional Tools.
- Support of delivered products from Box level to ATLO.
- Perform reliability analysis and prepare FMEA (Failure Modes and Effects Analysis) for different interfaces.
- Manage hardware procurements, work with external vendors to streamline the process.
Bachelors degree in Computer Engineering, Computer Science, Electrical Engineering, or related technical discipline with typically a minimum of 9 years of related experience or Masters degree in similar disciplines with a minimum of 7 years of related experience or PhD degree in similar disciplines with a minimum of 5 years of related experience. Level will be determined according to candidate experience and achievement.
- MUST HAVE: Evidence of experience designing multi-layer boards, mixed signal, high-speed designs, performing signal integrity analysis, and performing length tuning, impedance matching, and stackup design techniques.
- Knowledge of electronic and power circuits with emphasis of interface level circuits to Avionics hardware.
- Signal integrity design and analysis, especially using Hyperlynx
- Skilled in analog and/or mixed signal design, and/or high-speed digital design
- Knowledge of FPGA digital design.
- Ability to effectively communicate to various teams.
- Detail oriented to effectively provide status of current work to various customers
- Board design, cable design, and electrical system design experience
- Experience with industry standard CAE (computer-aided engineering) tools for electronics design and electrical engineering, such as DxDesigner, LTspice, Altium, Visio, Multisim/Verilog-XL, as well as EE electronic lab equipment, including ISE or Vivado, Modelsim or QuestaSim, Oscilloscopes
- Track record of leading teams and/or mentoring junior engineers
Must be a US Citizen or legal permanent resident (LPR).Desired Skills:
- Knowledge of applicable Laboratory policies and procedures, NASA policies and procedures, and government regulations.
- Experience with simulation and test equipment.
- Experience with ground data systems.
- GIT repository configuration and/or version management
- High speed SERDES buses (PCIe/Ethernet)
JPL has a catalog of benefits and perks that span from the traditional to the unique. This includes a variety of health, dental, vision, wellbeing, and retirement plans, paid time off, learning, rideshare, childcare, flexible schedule, parental leave and many more. Our focus is on work-life balance, and living healthy, fulfilling lives as we Dare Mighty Things Together. For benefits eligible positions, benefits are effective the first day of the month coincident with or immediately following the employee’s start date.
For further benefits information click Benefits and Perks
The hiring range displayed below is specifically for those who will work in or reside in the location listed. In extending an offer, Jet Propulsion Laboratory considers factors including, but not limited to, the candidate’s job related skills, experience, knowledge, and relevant education/training. Hiring range for this job may be adjusted based on primary work location outside of Pasadena, California. This adjusted range will be provided to candidates by the Recruiter when applicable.
The typical full time equivalent annual hiring range for this job in Pasadena, California.
$143,936 - $180,960
JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law.
In addition, JPL is a VEVRAA Federal Contractor.
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The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here.