New ideas are all around us, but only a few will change the world. That’s our focus at JPL. We ask the biggest questions, then search the universe for answers—literally. We build upon ideas that have guided generations, then share our discoveries to inspire generations to come. Your mission—your opportunity—is to seek out the answers that bring us one step closer. If you’re driven to discover, create, and inspire something that lasts a lifetime and beyond, you’re ready for JPL.
Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence.Qualifications
- Bachelor's degree in Engineering, Physics, or related technical discipline with a minimum of 3 year of professional experience, or Master's degree in a related technical discipline with 1 professional experience.
- Experience with high level programming languages such as Python, C, C++, Matlab, System Verilog, LabVIEW, and LabVIEW FPGA.
- Writing scripts to aid team members in FPGA development
- Working with team members to improve FPGA design and verification flow
- Working with team members to improve hardware and software functionality and robustness
- Applying digital design knowledge and principles to designs
- Developing and implementing electrical ground support equipment hardware and software.
- Ensuring that subsystem testing is successfully accomplished according to plan.
- Attending project meetings and work with other team members to accomplish and meet project goals.
- Regularly meeting with the team, assessing status, reviewing problems, planning short-term and long-term activities as well as presenting test results at project reviews and meetings.
- Participating in multidisciplinary and multi-organizational working groups across government and non-government agencies to plan and execute end-to-end testing activities.
- Working independently and within a team environment, collaborating on tasks performed across a spectrum of disciplines.
- Ability to learn architecting, designing, and implementing Block and System-level Universal Verification Methodology (UVM) / UVM Framework (UVMF) constrained random verification environments.
- Ability to learn how to create a verification plan and functional coverage matrix from requirements and design specifications.
- Experience working with an FPGA design and verification team
- Ability to learn through an FPGA/ASIC full life cycle from initial concept to implementation.
- Experience infusing new verification technologies and methodologies
- Ability to handle fast paced and dynamic product development work environment
- Excellent written/verbal communication skills
- Availability for occasional domestic and foreign travel.
- Experience designing with radiation tolerant Xilinx and Microsemi FPGAs
- Experience in bus standards protocol such as: sRIO, SpaceWire, PCI, MILSTD-1553, CAN, and Ethernet
- Embedded Software knowledge and experience
- SystemC or C++, Matlab
- Experience with digital twin modeling
- Familiar with Failure Analysis and worst-case analysis
JPL has a catalog of benefits and perks that span from the traditional to the unique. This includes a variety of health, dental, vision, wellbeing, and retirement plans, paid time off, learning, rideshare, childcare, flexible schedule, parental leave and many more. Our focus is on work-life balance, and living healthy, fulfilling lives as we Dare Mighty Things Together. For benefits eligible positions, benefits are effective the first day of the month coincident with or immediately following the employee’s start date.
For further benefits information click Benefits and Perks
The hiring range displayed below is specifically for those who will work in or reside in the location listed. In extending an offer, Jet Propulsion Laboratory considers factors including, but not limited to, the candidate’s job related skills, experience, knowledge, and relevant education/training. Hiring range for this job may be adjusted based on primary work location outside of Pasadena, California. This adjusted range will be provided to candidates by the Recruiter when applicable.
The typical full time equivalent annual hiring range for this job in Pasadena, California.
$97,968 - $122,824
JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law.
In addition, JPL is a VEVRAA Federal Contractor.
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Pay Transparency Nondiscrimination Provision
The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here.