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Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence.
The JPL Communications, Tracking and Radar Division (3300)
performs scientific investigations, advanced technology research, engineering developments and system implementations encompassing space telecommunications, tracking and active remote sensing using electromagnetic waves.
The Flight Communications Systems Section (3370)
provides cost-effective space communications systems, services, and products for NASA/JPL missions, including direct-to-Earth (DTE) and proximity relay links. The section provides related products and support, including antennas and radio frequency (RF) power amplifiers, for other space RF systems such as radars, radio science, and Global Positioning System (GPS) systems and position sensors.
The section’s objectives are to develop breakthrough, resource-effective, reliable communications technologies and infuse them into JPL flight projects to enhance mission capability and success; adapt and apply these technologies to remote sensing and other science applications; and develop a knowledgeable and capable section of expert engineers through a careful balance of flight implementation, research, and development.
The Spacecraft Reconfigurable Communication Systems Group (337A)
seeks a Senior FPGA/Digital Design Engineer
to join the team. The Spacecraft Reconfigurable Communication Systems Group leads the development of software/firmware- defined digital flight electronics for telecommunications, radio metrics, and radar support applications. The group has cognizance over the Electra UHF Transceiver (EUT) and Universal Space Transponder (UST) designs, which are recommended for application on all JPL class A, B, and C missions.Responsibilities
- Be a Cognizant Engineer in the Spacecraft Reconfigurable Communication Systems Group and lead a team of firmware engineers to develop, test, and deliver prototype, engineering and flight models of digital/analog hardware for new products or upgrades to existing products
- Lead and participate in development of the electronics and firmware requirements and show traceability to higher level project requirements.
- Work with flight electronics system and cognizant engineers to review existing interfaces and ECR design changes as necessary.
- Collaborate with flight electronics system and cognizant engineers to develop and execute subsystem V&V plan.
- Support electronics Bench Test Equipment (BTE) development and test.
- Support worst case analysis of timing and functions in firmware and reviews.
- Lead and support software and firmware modifications, verification, and deliveries.
- Lead and support the overall design, implementation, and testing of the firmware developed on Engineering and Flight Model boards and sub-assemblies.
- Upgrade and evaluate existing boards and perform required modifications to existing firmware and support the update of PWB schematics and layouts to comply with requirements pertaining to the digital processing.
- Lead or support the development of firmware test plans and procedures.
- Lead or support functional testing and integration of the engineering and flight model hardware with firmware and software.
- Be responsible for firmware module delivery schedule and budget.
- Participate in project and subsystem milestone reviews and Monthly Management Reviews (MMRs).
- Support project sub-system, system and Assembly, Test and Launch Operations (ATLO) Integration and Test.
- Support flight electronics environmental test campaigns.
- Be responsible for handling of flight articles including interaction with QA and use of Build, Assemble, and Test (BATs).
- Support Ground Support Equipment (GSE) hardware and software development, documentation, and testing.
- Interface with team members, product delivery and task managers, line management, government agencies, other NASA centers, vendors, contractors, and suppliers.
- Bachelor’s degree in Electrical Engineering, or related technical discipline with a minimum of 9 years of related experience, a Master’s degree in similar disciplines with a minimum of 7 years of related experience, or a Ph.D. in similar disciplines with a minimum of 5 years related experience.
- Demonstrated experience in the design, development and delivery of FPGA related firmware for radio products or space flight hardware.
- Demonstrated experience developing design requirements, solving engineering problems, coordinating fabrication, assembly, and qualification of hardware.
- Extensive understanding and wide application of advanced principles, theories, concepts, and techniques in PWB implementation, digital hardware, FPGAs, and microprocessors.
- Experience with Altium Designer, SolidWorks, ANSYS HFSS, Genesis, Matlab, Verilog/VHDL, C/C++, and LabView.
- Experience in cost account management and schedule tracking.
- Experience with software defined radios and digital signal processing.
- Experience with high speed digital interface and modem developments.
- Advanced knowledge of applicable Laboratory policies and procedures, NASA policies and procedures, and government regulations.
- In depth understanding of electronic systems, design, fabrication, debugging, and integration and test.
- Demonstrated ability to oversee re-use of inherited EM/FM software and firmware.
- Demonstrated ability to develop and execute V&V plans and procedures.
- Advanced knowledge in one or more of the following areas: PWB design, fabrication, and assembly; digital hardware; FPGAs and firmware; microprocessors and embedded software.
- Advanced knowledge of applicable industry and/or academic practices and standards in circuit design, simulation, and schematic capture.
JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law.
In addition, JPL is a VEVRAA Federal Contractor.
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The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here.